When ATM cells are transmitted through a line requiring transmitting speed over 155.52 Mbps, a high speed switching apparatus is required to be switched in real time for each cell. However, in the conventional timedivision switching apparatus for such high speed cell switching, the switching path allocation line and the information transmission line of subscribers are different each other. Therefore, the apparatus is not suitable for switching such short messages as ATM cells at high speed in real time. Furthermore, the existing proposal entiled "Self Routing Switching Apparatus" (Patent No. J01256246 A89/10/12 8947) makes the construction of the system difficult and requires high manufacturing cost since it processes parallely with using buffer memories. There is another proposal (Patent No. WO8805982 A 88/08/11 8823) such that the ATM cell with a control signal needs to include routing information for switching and a complicated internal protocol is required to insert the routing information into the input message. Moreover, the proposal requires to maintain timing not only between the different input modules of the parallel input, but also between the different internal modules of the high speed processing system. Thus, the conventional high speed ATM cell switching apparatuses have the disadvantages described above.